LINEAR POWER SUPPLY DESIGN TECHNIC

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1. Voltage Regulator Principles

To maintain a constant VO, a regulator circuit is inserted between RZ and RL as shown in Figure 1. There is a voltage drop across the regulator, VREG ; therefore, the input votage, VDC, must be larger than VDC  shown in Figure 1. In Figure 1, VO = VDC - ( VZ + VREG ).

Fig. 1

1.1 Regulator Action

To perform the required regulation, the regulator circuit varies VREG to keep VO constant as IL and VDC change. IF IL increases, VZ increases which tends to reduce VO ; however, the regulator reduces VREG to offset the increase in VZ so VO remains constant. Conversely, if IL decreases, which tends to increase VO, the regulator increases VREG to keep VO constant. Similarly, the regulator increases or decreases VREG if VDC increases, respectively.

1.2 Sampling Circuit

The sampling circuit monitors the output voltage and feeds an output voltage sample to the error amplifier.

1.3 Reference Voltage Generator

The reference voltage generator maintains a constant reference voltage for the error amplifier regardless of input voltage variations.

1.4 Error Amplifier

The error amplifier compares the output voltage sample to the reference voltage and generates an error voltage if there is any difference between them. The error amplifier output is fed to the control element to control the value of VREG.

1.5 Control Element

The control element is essentially a variable resistance which is in series with VDC, RZ and RL. When VDC or IL changes, the input from the error amplifier adjusts this variable resistance to change VREG to hold VO constant as explained above.

 

2. Fold-back Type Over Current Protection

2.1 Circuit of Fold-Back Type Protection

Fig. 2

2.2 Feature of Fold-Back Type Protection

Fig. 3

 

3. Useful Design for Linear Voltage Regulated Power Supply

3.1 Requirements for Example

Input AC voltage (Eac-in) : AC 100 ± 10V
Input AC frequency (Fin) : 50Hz
Output voltage (Eo) : DC 30V
Output current (Io) : 5A
Maximum temperature (Ta) : 60°C
Over current protection : Fold-back type

3.2 Basic Circuit Diagram for Sample

Fig. 4

T1 ; Power transformer
Dr ; Bridge diode
Cr ; Filtering capacitor
Tr ; Power transister
Dz ; Zener diode

3.3 Design of Sample Regulated Power Supply Circuit (for example Fig. 4)

3.3.1 Design of Fold-back Type Over Cureent Protection Circuit (Tr4, Rsc, R5 and R6)

3.3.1.1 Decision of Protection Sensor Resistor RSC

The maximum output current IM is need more margin 10% than output current Io.
IM = Io * 1.1 = 5 * 1.1 = 5.5 (A)
The silicon transister Tr4 base-emitter voltage VBE is approximately 0.6V, VBE = 0.6V.
So, the minimum IscIsc(MIN) = 4 * VBE * IM / Eo = 4 * 0.6 * 5.5 / 30 = 0.44 (A)
Also, the maximum Rsc, Rsc(MAX)  = VBE / Isc(MIN) = 0.6 / 0.44 = 1.36 (目)
And the minimum Rsc, Rsc(MIN) = VBE / IM = 0.6 / 5.5 = 0.11 (目)
Therefore, Rsc = ( Rsc(MAX) + Rsc(MIN) ) / 2 = ( 1.36 + 0.11 ) / 2 = 0.735 (目) ⊥ 0.5目
The maximum down voltage at Rsc resistor, VRSC(MAX) Rsc * IM = 0.5 * 5.5 = 2.75 (V)
And so, the maximum consumption power of Rsc is, PRSC = VRSC(MAX)  * IM = 2.75 * 5.5 = 15.1 (W) ⊥ 20W
As the calculation result, the protection sensor resistor Rsc is needed 2 EA parallel of 1目 10W cement resisters.
The down voltage of VCE and VREG voltage at regulator is about 5V.
Therefore, the minimum input DC voltage of regulator Ei, Ei-min = Rsc * IM + VCE + Eo = 0.5 * 5.5 + 5 + 30 = 37.75 (V)

3.3.1.2 Decision of Resistor R5 and R6

The normal current of R5 and R6, I4 is designed approximately 10mA.
Therefore, R5 = ( Rsc * IM + Eo ) / I4 } * { ( Rsc * IM - VBE ) / Eo } = ( 0.5 * 5.5 + 30 ) / 0.01 } * { ( 0.5 * 5.5 - 0.6 ) / 30 } = 234.7 (目) 220目
And so, the consumption power of R5 is Pr5 = R5 I4 2 = 220 * 0.01 * 0.01 = 0.022 (W) ⊥ 1/8W
Also, R6 = ( Rsc * IM + Eo ) / I4  - R5 = ( 0.5 * 5.5 + 30 ) / 0.01 - 220 = 3055 (目) 3K目
So the consumption power of R6 is Pr6 = R6 I4 2 = 3000 * 0.01 * 0.01 = 0.3 (W) ⊥ 1/2W
As the calculation result, R5 and R6 are needed 220目 1/8W and  3K目 1/2W resisters.

3.3.1.3 Decision of Protection Transister Tr4

From sentence 3.3.2.1, Eac = 35V, and at sentence 3.3.3.1, bias resistor R = 3K目
So the maximum collector current of Tr4, Ic4(MAX) is ;
Ic4(MAX) = 1.4142 * Eac / Eac-in * Eac-in(MAX) / R = 1.4142 * 35 / 100 * 110 / 3000 = 0.018 (A) = 18 (mA) ⊥ Ic 20mA
Therefore, as the calculation result, Tr4 is needed bigger NPN transister of the maximum collector current more than Ic 20mA, for example 2SD525.

3.3.2 Design of Rectifier Circuit (T1, Dr and Cr)

3.3.2.1 Decision of Power Transformer T1

The second coil AC voltage of power transformer T1, Eac is ;
Eac = Eac-in / Eac-in(MIN) * ( Rw / RL + 1 ) * Ei-min / ( 1.4142 * 乓 )
Here, Rw is the resistance of second coil including bridge diode, It is about 0.5目.
The load resistance RL = Ei-min / I= 37.75 / 5.5 = 6.864 (目), and 乓 = approx. 0.92
Therefore, Eac = 100 / 90 * ( 0.5 / 6.864 + 1 ) * 37.75 / ( 1.4142 * 0.92 ) = 34.59 (V) 35V
The second coil AC current of power transformer is Iac = 休 / ( 2 * 1.4142 ) * IM  = 3.14 / 2.8284 * 5.5 = 6.1 (A) ⊥ 6A
As the calculation result, the power transformer T1 is needed AC 35V 6A (210VA).

3.3.2.2 Decision of Bridge Diode Dr

The maximum DC peak current of bride diode is Ipeak = IM * 1.4142 = 5.5 *1.4142 = 7.78 (A) ⊥ 10A
And the PIV voltage of diode, VPIV is ;
VPIV = 2 * 1.4142 * Eac * Eac-in(MAX)  / Eac-in = 2 * 1.4142 * 35 * 110 / 100 = 108.9 (V) ⊥ PIV 150V
As the calculation result, the bridge diode Dr is needed PIV 150V 10A.

3.3.2.3 Decision of Filtering Capacitor Cr

The minimum capacity of Cr is ;
Cr = ( 1 / RL ) * { 1 / ( 2 * Fin ) } * [ { 1 - ( cos-1 乓  / 休 ) } / ln ( 1 / 乓 ) ] = ( 1 / 6.864 ) * { 1 / ( 2 * 50 ) } * [ { 1 - ( cos-1 0.92 / 3.14 ) } / ln ( 1 / 0.92 ) ] = 0.015232 (F) = 15232 (µF) ... (? ... ?) (@ ... @)
However, there is very simple design methode ! ; 3000µF per ampere
So, Cr = Io * 3000µF/A = 5 * 3000 = 15000 (µF)
And then, this capacity will be dwindle in course of years. So we have to design more bigger capacity about 30% than this calculation value.
Cr = 15232 * 1.3 = 19802 (µF) ⊥ 20000µF
And the working voltage of Cr, Vc is ;
Vc = 1.4142 * Eac * Eac-in(MAX)  / Eac-in = 1.4142 * 35 * 110 / 100 = 54.45 (V) ⊥ 100WV
So the calculation result, the filtering capacitors Cr are needed 2 EA parallel of 10000µF 100WV electrolyte capacitors.

3.3.3 Design of Control Circuit (Tr1, Trd, Tr, R, Re and C)

3.3.3.1 Decision of Control Bias Resistor R

The control bias resistor, R < hFE * { ( Ei-min - Eo - VBE ) / IM - Rsc }
Here, hFE of total control circuit's DC current amplification ratio is generally about 4000.
Therefore, the maximum resistance of bias resister R, Rmax is ;
Rmax = hFE * { ( Ei-min - Eo - VBE ) / IM - Rsc } = 4000 * { ( 37.75 - 30 - 0.6 ) / 5.5 - 0.5 } = 3200 (目) 3K目
And the consumption power of R, PR is ;
PR = 2 / R  ( Eac Eac-in(MAX)  / Eac-in ) 2 = 2 / 3000 * ( 35 * 110 / 100 ) 2 = 0.988 (W) 2W
As the calculation result, the control bias resistor R is needed 3K目 2W cement resister.

3.3.3.2 Decision of Control Bias Capacitor C

The control bias capacitor, C is approximately  0.01~0.5µF.
Here, this capacitor is about 0.1µF.
And the working voltage of C is the same as Cr.
Therefore, the control bias capacitor C is needed 0.1µF 100WV capacitor.

3.3.3.3 Decision of Control Transister Tr

The control transister of Tr is decided by the maximum collector loss Pc(MAX), the maximum collector current Ic(MAX) and the maximum collector-emitter voltage Vceo(MAX) .
Ei-max = Ei-min / 乓 = 37.75 / 0.92 = 41.0326 (V), Isc = VBE / Rsc = 0.6 / 0.5 = 1.2
Therefore, the collector loss of Tr, Pc(MAX) is ;
Pc1 = ( Ei-max + Ei-min ) / 2 * 110 / 90 * Isc = ( 41.0326 + 37.75 ) / 2 * 110 / 90 * 1.2 = 57.7739 (W)
Pc2 = ( Ei-max + Ei-min ) / 2 * 110 / 90 - Eo -Rsc * IM ) * IM = ( 41.0326 + 37.75 ) / 2 * 110 / 90 - 30 - 0.5 * 5.5 ) * 5.5 = 84.672 (W)
Here, Pc1 < Pc2, if possible we choose the large value, the maximum collector loss Pc(MAX) of Tr is 84.672W. ⊥ Pc 100W ⊥ Pc 50W * 2EA
The maximum collector current of Tr  is, Ic(MAX)  = IM = 5.5 (A) ⊥ Ic 6A ⊥ Ic 3A * 2EA
The maximum collector-emitter voltage of Tr is, Vceo(MAX)  = 1.4242 * Eac * 110 / 100 = 1.4142 * 35 * 110 / 100 = 54.4467 (V) ⊥ Vce 60V
Therefore, the calculation result, the control transistors Tr are needed 2 EA parallel NPN transistors 2N3055 of the maximum collector-emitter voltage more than Vce 60V, the maximum collector current more than Ic 3A and the maximum collector loss more than Pc 50W.

3.3.3.4 Decision of Load Balancing Resistor Re

The load balancing resistor, Re is approximately 0.1~1目.
Here, this resistor loss votage is about less than 10% of output voltage.
And then, at sentence 3.3.3.3 resistors Re are the same numbers with transistors Tr.
Therefore, the maximum resistance of load balancing resister Re, Re(MAX) is ;
Re(MAX)Eo * 0.1 / IM  / N = 30 * 0.1 / 5.5 / 2 = 0.2727 (目) 0.2目
And the consumption power of Re is PRe = Re * ( IM / N ) 2 = 0.2 * ( 5.5 / 2 ) 2 = 1.51 (W) 2W
As the calculation result, the load balancing resistor Re are needed 2 EA 0.2目 2W resister.

3.3.3.5 Decision of Transister Trd

Here, if hFEC of the control transister Tr is 20, the maximum collector loss of Trd is Pcd(MAX) = Pc(MAX) / hFEC = 84.672 / 20 = 4.236 (W) ⊥ Pc 5W
The maximum collector current of Trd, Icd(MAX) = IM / hFEC = 5.5 / 20 = 0.275 (A) ⊥ Ic 300mA
The maximum collector-emitter voltage of Trd, Vced(MAX)  = Vceo(MAX)  = 55 (V) ⊥ Vce 60V
Therefore, the calculation result, the transistor Trd is needed PNP transistor of maximum collector loss more than  Pc 5W, the maximum collector current more than Ic 300mA and the maximum collector-emitter voltage more than Vce 60V, for example 2SB616.

3.3.3.6 Decision of Transister Tr1

Here, if hFEd of transister Trd is 20, the maximum collector loss of Tr1 is Pc1(MAX) = Pcd(MAX) / hFEd = 4.236 / 20 = 0.2118 (W) ⊥ Pc 250mW
The maximum collector current of Tr1, Ic1(MAX) = Icd(MAX)  / hFEC = 0.275 / 20 = 0.01375 (A) = 13 (mA) ⊥ Ic 20mA
The maximum collector-emitter voltage of Tr1, Vce1(MAX) = Vceo(MAX) = 55 (V) ⊥ Vce 60V
Therefore, the calculation result, the transistor Tr1 is needed NPN transistor of the maximum collector loss more than  Pc 250mW, the maximum collector current more than Ic 20mA and the maximum collector-emitter voltage more than Vce 60V, for example 2SD525.

3.3.4 Design of Sampling and Reference Voltage Generator Circuit (Tr2, Tr3, Dz, R1, R2, R3, R4 and Rv)

3.3.4.1 Decision of Reference Voltage Generator Dz

Here, the maxium reference voltage of Dz, Vz(MAX) is approximately 2/3 of output voltage.
Vz(MAX)  = Eo * 2 / 3 = 30 * 2 / 3 = 20 (V)
And the minimum reference voltage of Dz, Vz(MIN) is approximately 1/2 of output voltage
Vz(MIN)  = Eo * 1 / 2 = 30 * 1 / 2 = 15 (V)
Therefore, the reference voltage is needed 15~20V.
Here, Dz is needed 3 EA serial connection RD6A diodes. Because RD6A is 6V zenner diode.

3.3.4.2 Decision of Reference Voltage Generator Resistor R3

Here, if current of R3, IR3 is approximately 10mA.
So, R
3 = ( Eo - Vz(MAX) ) / IR3 = ( 30 - 20 ) / 0.01 = 1000 (目) ⊥ 1K目
And the consumption power of R3 is PR3 = R3 IR3 2 = 1000 * 0.01 * 0.01 = 0.1 (W) 1/4W
As the calculation result, R3 is needed 1K目 1/4W resister.

3.3.4.3 Decision of Voltage Sampling Resistor R1, R2 and Rv

Here, if current of R1, IR1 is approximately 10mA ;
R1 = ( Eo - Vz(MAX) ) / IR1 = ( 30 - 20 ) / 0.01 = 1000 (目) ⊥ 1K目
R2 = ( Eo - Vz(MIN) ) / IR1 = ( 30 - 15 ) / 0.01 = 1500 (目) ⊥ 1.5K目
Rv = ( Vz(MAX)  - Vz(MIN) ) / IR1 = ( 20 - 15 ) / 0.01 = 500 (目) ⊥ 500目
And the consumption power of R1R2 and  Rv is ;
PR1 = R1 IR1 2 = 1000 * 0.01 * 0.01 = 0.1 (W) 1/4W
PR2 = R2 IR1 2 = 1500 * 0.01 * 0.01 = 0.15 (W) 1/2W
PRV = Rv IR1 2 = 500 * 0.01 * 0.01 = 0.05 (W) 1/4W
As the calculation result, R1 and R2 are needed 1K目 1/4W and 1.5K目 1/2W resisters.
Rv is needed 500目 1/4W variable resister.

3.3.4.4 Decision of Error Amplifier Transistors Tr2 and  Tr3

Here, Tr2 and Tr3 must be the same transistors.
The maximum collector current of Tr
2 is ;
IcTr2(MAX)  = ( 1.4142 * Eac * Eac-in(MAX) / Eac-in - Eo ) / R = ( 1.4142 * 35 * 110 / 100 - 30 ) / 3000 = 0.0081489 (A) = 8.1489 (mA) ⊥ Ic 10mA
The maximum collector loss of Tr2 is ;
Pc2(MAX) = IcTr2(MAX)  * ( Eo - Vz(MIN) + VBE ) = 0.0081489 * ( 30 - 15 + 0.6 ) = 0.12712 (W) ⊥ Pc 200mW
Here, the base currenet of Tr2 is about 1/10 of IR1 above sentence 3.3.4.3
Therefore, hFE2 of Tr2 = ( IcTr2(MAX)  * 10 ) / IR1 = ( 0.0081489 * 10 ) / 0.01 = 8.1489 ⊥ hFE 10
The maximum collector-emitter voltage of Tr2 and Tr3, Vce2(MAX)  = Vceo(MAX) = 55 (V) ⊥ Vce 60V
The error amplifier transistors Tr2 and Tr3 are needed the maximum collector-emitter voltage more than Vce 60V, the maximum collector current more than Ic 10mA, the maximum collector loss more than Pc 200mW and the DC current amplification ratio hFE 10. Therefore, these are suitable such as NPN transistors 2SD525.

3.3.4.5 Decision of Error Amplifier Resistor R4

Also, the error amplifier resistor R4 is ;
R4 = ( Vz(MIN)VBE ) / IcTr2(MAX)  = ( 15 - 0.6 ) / 0.0081489 = 1767 (目) ⊥ 1.8K目
And the consumption power of R4, PR4 is ;
PR4 = R4 IcTr2(MAX) 2 = 1767 * 0.0081489 * 0.0081489 = 0.1173 (W) 1/4W
As the calculation result, R4 is needed 1.8K目 1/4W resister.

3.3.5 Design of Output Stabilizer Capacitor Co

The output stabilizer capacitor, Co is approximately 1/10 ~ 1/50 of the filtering capacitor Cr.
Here, the filtering capacitor Cr is about 20000µF at sentence 3.3.2.3. So this Co is ;
Co = Cr / 30 = 20000 / 30 = 667 (µF)  ⊥ 680µF
And the working voltage of Co is the same as Cr.
Therefore, the output stabilizer capacitor Co is needed 680µF 100WV electrolyte capacitor.

TNX ES 73 !


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